Electronics devices are developing towards more compact form factors, more versatility, higher performance, and lower power consumption, driving IC packaging technologies towards SiP (System-in-Package) from single chip package. Among various SiP technologies, TSV 3D IC (Through-Silicon-Via) which vertically interconnects stacked dies using TSV technology has been considered the future packaging technology due to its high space efficiency and performance. Up to now, TSV 3D IC technology has only been applied to the integration of homogeneous chips, resulting in a low industrial value. However, the situation is about to change as some foreign vendors are projected to make technological progress. This report provides the overview development of TSV 3D IC from the aspects of technology, market, and industry.
List of Topics
Overview of the development of global packaging technology SiP (System-in-Package), in particular TSV (Through-Silicon-Via) 3D IC technology; four major production processes and existing challenges of TSV 3D IC in stacking, circuit, stress, heat dissipation, yield and cost are also covered
Development of the TSV 3D IC market and industry, including the global industry value forecast up to 2017 and major players' development plan in 2015 and 2016; also provided are those players' mass production timetable for TSV 3D IC
Overview of the deployment of TSV 3D IC industry alliances, covering upstream to downstream segments of fabless, foundry, memeory, packaging and IDM; also included are the position of US, UK, Korean, Singaporean, and Taiwanese players in the TSV 3D IC supply chain
1 Development of Global Packaging Technologies 1.1 SiP to Become Mainstream Technology 1.2 TSV 3D IC: The Future Trend of Packaging Technology 1.3 Uniqueness of TSV 3D IC Technology 1.4 Existing Challenges for TSV 3D IC 1.5 Foreign Players' Leading Position in TSV 3D IC
2 Development of TSV 3D IC Market 2.1 Strong Growth Potential 2.1 Mass Production Activities Remain Low 2.2 Market Growth to Speed Up with Technological Enhancement
3 Development of the TSV 3D IC Industry 3.1 Formation of Cross-industry Alliances 3.2 Taiwanese IC Design Houses' Absence in HMCC 3.3 Close Cooperation between Taiwanese Upstream and Downstream Players Required
List of Tables
Table 1 Current Challenges in TSV 3D IC Development Table 2 Technology Development and Mass Production Timetable of Taiwanese and Foreign TSC IC Chipmakers Table 3 TSV-based ICs Mass Produced as of Year-end 2014 Table 4 Impact on Taiwan's Semiconductor Industry
List of Figures
Figure 1 Development of Electronic Devices and Packaging Technologies Figure 2 Comparison of TSV 3D IC and Other Packaging Technologies Figure 3 Production Process of TSV 3D IC Figure 4 Worldwide TSV 3D IC Industry Value Forecast, 2014 - 2017 Figure 5 Major Players' Development Plan in 2015 and 2016 Figure 6 Comparison of Industry Alliances Worldwide Figure 7 Participation of Taiwanese and Korean HMCC Members
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Published By: Market Intelligence & Consulting Institute, MIC
Market Intelligence & Consulting Institute, MIC94
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